etched cluster-scale memory has so many SerDes https://t.co/V6yTAtsYf9 https://t.co/OZHcQshvUj

SemiAnalysis Twitter · SemiAnalysis (@SemiAnalysis_) · 2026-06-30

Etched announces Cluster-Scale Memory (CSM), an AI chip architecture using a proprietary low-latency interconnect to create a shared HBM/SRAM hybrid memory pool across chips, eliminating the latency-throughput tradeoff in large mixture-of-experts model inference.

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NVIDIA vs. Custom ASICs: GPU Dominance Persists Despite Startup Performance Claims

Extraction

Topics: ai-hardwarechip-architecturememory-systemsmixture-of-expertsetched

Claims

Current AI chips using HBM cannot achieve SRAM-level decode speeds due to memory subsystem and interconnect bottlenecks.
Etched's CSM creates a shared low-latency memory pool across an entire scale-up domain using a proprietary ultra-low-latency, high-bandwidth interconnect.
The HBM/SRAM hybrid design enables both high throughput and interactive inference speeds simultaneously.
CSM avoids the cost, reliability, yield, thermal, and compute tradeoffs of SRAM-only chips, 3D DRAM chips, or optics.
SemiAnalysis noted that the Etched CSM design requires a very large number of SerDes interfaces.

Key quotes

etched cluster-scale memory has so many SerDes

Each memory layer inherently adds latency; thus, the best layer is no layer.

We've designed a new architecture that creates a shared low-latency memory pool across the entire scale-up domain.