This last week JEDEC announced a new standard for SPHBM4: Standard Package High Bandwidth Memory (JESD330-4).
SemiAnalysis Twitter · SemiAnalysis (@SemiAnalysis_) · 2026-07-03
JEDEC announced the SPHBM4 standard (JESD330-4), which adapts HBM4 DRAM stacks with a different buffer die to enable high-bandwidth memory assembly in standard packaging and relieve the AI advanced packaging bottleneck.
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Extraction
Topics: high-bandwidth-memorysemiconductor-packagingai-hardwarejedec-standards
Claims
- JEDEC announced the SPHBM4 (Standard Package High Bandwidth Memory) standard under designation JESD330-4.
- SPHBM4 uses the same DRAM stacks as conventional HBM4 but replaces the buffer die with a different component.
- The standard is designed to enable HBM assembly in standard packaging, reducing reliance on advanced packaging processes.
- Breaking the advanced packaging bottleneck is explicitly cited as a motivation for the new standard.
Key quotes
It utilizes the same DRAM stacks as HBM4, but swaps in a different buffer die. The goal? Enable HBM assembly in standard packaging and break the AI Advanced Packaging bottleneck.