NVIDIA Launches Vera CPU and Vera Rubin NVL72 at COMPUTEX / GTC Taipei

What

Why it matters

Open questions

• Rack-level mass production of Rubin had not started as of the COMPUTEX keynote [5] — when does it begin, and does the wafer-to-rack lag create delivery gaps against the large commitment volumes announced by Microsoft, CoreWeave, and others?

• Both CoreWeave and Microsoft have achieved single-rack L11 bring-up [3][5], but full-cluster L12 validation with scale-out networking has not been demonstrated by either [4] — when does the first L12 milestone occur?

• NVIDIA's official NVLink Fusion materials describe it as enabling 'semi-custom AI infrastructure' [14], but the structural terms require third-party chips to adopt NVIDIA's NVLink interconnect — does this represent genuine architectural openness or a mechanism for retaining ecosystem control?

• Micron's IR press release asserts high-volume HBM4 production for Vera Rubin [21], while multiple independent sources conclude NVIDIA designated only Samsung and SK Hynix as suppliers [22][23][24] — has Micron secured an actual production allocation?

Narrative

Timeline

• 2026-01-05: NVIDIA debuts Rubin chip at CES: 336 billion transistors, 50 petaflops AI performance. [44]
• 2026-01: Jensen Huang announces at CES 2026 that Vera Rubin NVL72 is in full production. [45][46]
• 2026-02: SK Hynix begins HBM4 mass production shipments to NVIDIA, holding approximately 70% of NVIDIA's HBM4 orders. [47][6]
• 2026-03-17: Nscale acquires 8GW Monarch Compute Campus in West Virginia; Microsoft signs 1.35GW LOI co-announced with NVIDIA and Caterpillar. [48][49][12][50]
• 2026-05: Samsung sells out entire 2026 HBM4 supply; rack prices reach $8.8M; HBM4 shortage projected to persist until 2028. [39][8][40][7]
• 2026-05: NVL72's 600kW per-rack power requirement documented as incompatible with existing data centers, requiring greenfield construction. [9][10][41]
• 2026-05: NVIDIA equity stake in Nscale confirmed at approximately $674M; Microsoft's Rubin GPU deployment via Nscale revised upward to 130,000 units. [43][11][29]
• 2026-05-18: First Vera CPUs hand-delivered to OpenAI, Anthropic, and other leading AI labs. [51][52][53]
• 2026-05-18: Jensen Huang keynotes Dell Technologies World: projects $3–4T AI infrastructure buildout by 2030 and flags memory supply as primary bottleneck. [25][54][55]
• 2026-05-21: NVIDIA reports Q1 2026 earnings: $81.6B revenue, up 85% year-over-year. [26][56]
• 2026-05-21: NVIDIA GTC Taipei: Vera Rubin NVL72 wins Computex Best Choice Golden Award; Meta, Google Cloud, and Microsoft formalize partnerships; NVIDIA announces $2B NVLink Fusion investment in Marvell. [57][58][59][60][28][27]
• 2026-05-26: Phoronix benchmarks of Vera CPU published: 1.5x overall x86 advantage, 1.6x geometric mean over Grace CPU, 90% peak bandwidth utilization. [19][20]
• 2026-05-31: Dell delivers world's first fully validated Vera Rubin NVL72 rack to CoreWeave; L11 diagnostics confirm scale-up domain operational. [1][2][3][4][30][31][32]
• 2026-06-01: Jensen Huang at COMPUTEX announces Microsoft completed bring-up of its first Rubin VR200 NVL72 rack via Foxconn; wafer-level production started, rack-level mass production not yet begun. [5]
• 2026-06-01: SemiAnalysis rates Jensen's COMPUTEX keynote 'F tier': no new AI datacenter products announced; Windows-on-NVIDIA-ARM transition unlikely to succeed. [17]
• 2026-06-01: Official NVIDIA and Marvell press releases frame NVLink Fusion as enabling 'semi-custom AI infrastructure' for third-party silicon integration. [13][14]
• 2026-06-02: NVIDIA NemoClaw industrial AI agent blueprint announced with adoptions from Cadence, Siemens, Dassault Systèmes, and Synopsys. [15]
• 2026-06-04: Jensen Huang identifies agentic AI as a $200B market opportunity, arguing CPUs shift from traffic-cop schedulers to active orchestration layers in the agentic era, giving Vera CPU an independent demand driver. [16]

Perspectives

Tensions

• Micron's official IR press release states high-volume HBM4 production for NVIDIA Vera Rubin [21], while TechPowerUp and multiple independent analyses conclude NVIDIA designated only Samsung and SK Hynix as HBM4 suppliers [22][23][24] — two claims mutually incompatible unless they refer to different allocation tiers. [21][22][23][24]
• NVIDIA markets Vera Rubin on a 10x cost-per-token reduction, but SemiAnalysis documents FP4/FP8 gains of ~3.5x over GB200 while FP16 gains are only ~1.6x and HBM capacity is flat [18] — the efficiency claim is workload-specific, not uniform across training or high-precision inference. [18][8][9]
• Official NVLink Fusion press materials frame the partnership as enabling 'semi-custom AI infrastructure' for third-party silicon [14], but the structural terms require those chips to adopt NVIDIA's NVLink interconnect — leaving unresolved whether this is genuine openness or an ecosystem control mechanism. [13][14][27]
• NVIDIA holds approximately $674M in Nscale equity [11] while publicly describing Nscale only as a commercial partner, making large deployment announcements co-publicized by both companies non-arm's-length transactions [12][42]. [42][43][11][12]
• Wafer-level mass production of Rubin has started but rack-level mass production has not yet begun [5], creating a gap between NVIDIA's production narrative and actual rack availability at a moment when large-scale deployment commitments from Microsoft and others are outstanding. [5]
• SemiAnalysis rated Jensen's COMPUTEX keynote 'F tier' for announcing no new AI datacenter products [17], while NVIDIA's promotional coverage treats the same event as a major milestone featuring Microsoft's NVL72 bring-up, NVLink Fusion official launch, and NemoClaw ecosystem expansion [5][14][15]. [17][5][14][15]