This marks a generational leap with up to 4x the bandwidth per accelerator and a 40% lower latency compared to previous …

SemiAnalysis Twitter · SemiAnalysis (@SemiAnalysis_) · 2026-06-03

SemiAnalysis details that Google's TPUv8t delivers up to 4x the bandwidth per accelerator and 40% lower latency versus its predecessor, connecting 14 pods of 9,600 TPUs each via a 3D Torus ICI on a flat two-layer topology.

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Google Reveals TPUv8t and Virgo 134K-Chip Scale-Out Interconnect

Extraction

Topics: google-tpuai-hardwarenetwork-architectureai-accelerators

Claims

Google's TPUv8t delivers up to 4x the bandwidth per accelerator compared to the previous generation.
The TPUv8t achieves 40% lower latency than the previous-generation TPU.
The architecture connects 14 TPU pods, each containing 9,600 interconnected TPUs, via a 3D Torus ICI.
The inter-pod network operates on a flat two-layer topology.

Key quotes

This marks a generational leap with up to 4x the bandwidth per accelerator and a 40% lower latency compared to previous generation.